Core Lesson Content
Giving Digital Systems a Heartbeat
Lessons 6 and 7 kept saying "on the clock edge" โ but where do clock edges come from? This capstone lesson completes the picture with the timing chain every digital system contains:
- Oscillators generate the repeating waveform โ the raw heartbeat โ with no input signal at all.
- Timers shape precise intervals from that behavior: a pulse exactly this wide, a delay exactly that long.
- Counters โ flip-flops from Lesson 6, organized โ count the edges into numbers, divide frequencies, and sequence events.
A digital clock, a frequency counter, and a stopwatch are all this one chain.
Try It Live
Oscillators: Output Without Input
Every amplifier in Lesson 4 needed an input signal. An oscillator needs none โ it manufactures its own repeating waveform from two ingredients:
- Positive feedback: a portion of the output returned in-phase to the input, reinforcing any change until the circuit swings rail to rail (the same positive feedback that made Lesson 4's Schmitt trigger snap).
- A timing element: something that delays the swing-back โ an RC network, an LC tank, or a quartz crystal โ setting the period of the resulting oscillation.
The Relaxation Oscillator
The workhorse pattern for digital clocks: a capacitor charges toward a threshold, a comparator snaps the output, the capacitor discharges toward a second threshold, and the comparator snaps back. Charge, snap, discharge, snap โ forever. The output is a square wave (perfect for clocking logic) and the capacitor voltage is a sawtooth bouncing between the two thresholds โ both waveforms are drawn live in the Lab's 555 mode.
The Multivibrator Family
| Circuit | Stable States | Behavior | You Met It In |
|---|---|---|---|
| Bistable | Two | Holds either state until commanded โ a latch/flip-flop | Lesson 6 |
| Monostable | One | Rests until triggered, emits one timed pulse, returns to rest | Tab 4 |
| Astable | None | Flips continuously on its own โ an oscillator | Tab 3 |
The 555 Timer in Astable Mode
The 555 โ billions manufactured yearly since 1972 โ packages the relaxation oscillator into eight pins. Inside: a resistor divider creating โ and โ VCC reference points, two comparators watching them, an SR latch, and a discharge transistor. In astable wiring, external parts Rโ, Rโ, and C set the tempo:
- C charges toward VCC through Rโ + Rโ; output is HIGH.
- C reaches โ VCC โ threshold comparator resets the latch โ output LOW, discharge transistor opens a path.
- C discharges through Rโ only toward ground.
- C falls to โ VCC โ trigger comparator sets the latch โ output HIGH โ back to step 1, forever.
Example: Rโ=10 kฮฉ, Rโ=47 kฮฉ, C=10 ยตF โ f = 1.44/(104k ร 10ยต) โ 1.4 Hz, duty โ 55%
Applications
LED flashers and tone generators, clock sources for counters where a few percent of drift is fine, PWM foundations, and โ historically โ half the hobby-electronics projects ever published.
The 555 Timer in Monostable Mode: The One-Shot
Rewire the same chip and it becomes a precision pulse-maker with one stable state: output LOW, capacitor held empty. Then:
- A falling edge on the trigger input (below โ VCC) sets the latch โ output snaps HIGH.
- C charges through R toward VCC.
- When C reaches โ VCC, the threshold comparator resets the latch โ output returns LOW and C is discharged, ready for the next trigger.
Example: R = 100 kฮฉ, C = 10 ยตF โ T = 1.1 ร 1.0 s = 1.1 seconds โ regardless of how long the trigger lasts
That last clause is the magic: a sloppy, bouncing, variable-length input produces one clean, exactly-timed output pulse. The one-shot is a pulse standardizer.
Applications
- Switch debouncing: a bouncing pushbutton (dozens of edges) becomes one clean pulse โ solving the very problem Lesson 6's SR latch debouncer addressed, with adjustable timing.
- Timed intervals: darkroom timers, delay-off lighting, watchdog timeouts, missing-pulse detectors.
- Pulse-width standardization ahead of counters โ guaranteeing every counted event has identical width.
Crystal Oscillators and System Clocks
RC oscillators drift โ resistor tolerance, capacitor aging, and temperature swing the 555's frequency by a few percent. Fine for a blinking LED; catastrophic for a watch (a 1% error is ~14 minutes per day). Precision timing uses quartz:
- The piezoelectric bargain: squeeze quartz and it makes a voltage; apply a voltage and it flexes. Cut a crystal to size and it rings at one mechanical resonant frequency with extraordinary purity โ an electrically-accessible tuning fork.
- In the feedback loop: replace the RC timing network with the crystal and the oscillator locks to the crystal's resonance โ stable to parts per million (seconds per month, not minutes per day).
- The magic number 32,768: watch crystals are cut for 32,768 Hz = 2ยนโต Hz, so a chain of fifteen T flip-flops (Lesson 6's divide-by-2, fifteen times) delivers exactly 1 Hz. Every quartz watch on Earth is this circuit.
Clock Distribution in Real Systems
A microprocessor board typically runs one crystal oscillator, then uses dividers (counters!) and multipliers to derive every internal clock โ CPU, memory, peripherals โ from that single disciplined source. When a technician sees timing chaos across a whole board, the crystal and its oscillator circuit are the first suspects: one part, every symptom.
Counter Fundamentals
A counter is Lesson 6's payoff: flip-flops arranged so their collective state steps through a fixed sequence, one step per clock edge. Read the outputs as a binary number (Lesson 5) and the circuit literally counts the pulses it has received.
Modulus: A Counter's Size
n flip-flops โ up to 2โฟ states ยท 4 FFs โ MOD-16 (counts 0โ15) ยท MOD also = frequency division ratio
Asynchronous (Ripple) vs. Synchronous
| Feature | Ripple (Asynchronous) | Synchronous |
|---|---|---|
| Clocking | Only stage 0 gets the clock; each Q clocks the next stage | Every flip-flop shares the same clock |
| Wiring | Minimal โ T flip-flops holding hands | Extra gating decides which stages toggle |
| Speed/glitches | Delays accumulate down the chain; outputs change at slightly different times (decoding glitches) | All outputs change together โ one flip-flop delay total |
| Use | Frequency division, slow counting, minimal parts | High-speed counting, decoded outputs, packaged MSI counters (74163) |
The ripple counter's charm is its honesty: it's nothing but the T flip-flop divide-by-2 from Lesson 6, chained. Q0 toggles every clock (รท2), Q1 toggles every Q0 cycle (รท4), Q2 (รท8), Q3 (รท16) โ and read together, Q3Q2Q1Q0 is the count in binary. Counting and frequency division are the same circuit viewed two ways.
The 4-Bit Binary Counter and the BCD (Decade) Counter
4-Bit Binary: MOD-16
Four flip-flops count 0000 through 1111 โ decimal 0 to 15 โ then roll over to 0000 and raise a terminal count / carry out pulse. That carry clocks the next 4-bit counter in a cascade, exactly as a car odometer's units wheel nudges the tens wheel. Applications: event counting, address generation, timers, and รท16 prescalers.
BCD (Decade): MOD-10
Humans read decimal, so display systems count in binary-coded decimal: each digit gets its own MOD-10 counter that counts 0โ9 and resets. The construction trick:
a NAND gate watching Q3ยทQ1 fires the asynchronous CLEAR โ counter snaps to 0000.
- The reset is Lesson 5 logic: 1010 is the first state where Q3 AND Q1 are both high โ two gate inputs detect it. The illegal state exists for only nanoseconds.
- Cascading decades: each counter's rollover clocks the next digit. Three decades + three of Lesson 7's BCD-to-seven-segment decoders = a 0โ999 display. This is the anatomy of every digital multimeter, frequency counter, and scoreboard.
- Division by ten: a decade counter is also a รท10 prescaler โ chain them for รท100, รท1000 in instrumentation.
The Up/Down Counter
Some quantities only grow โ elapsed seconds, total visitors. Others rise and fall โ items in stock, position on a track, people in a room. The up/down counter serves the second kind with a direction control:
- Direction input: one control line selects the sequence โ UP counts 0,1,2,โฆ,15,0 while DOWN counts 15,14,โฆ,0,15. Internally, gating chooses whether each stage watches the previous stage's Q (up) or Q̅ (down).
- Dual-clock versions: some parts (the classic 74193) instead provide separate count-up and count-down clock inputs โ pulse whichever event occurred.
- Borrow and carry: full up/down parts provide both a carry (rolled over the top) and a borrow (rolled under zero) for cascading in either direction.
Applications
- Position tracking: a motor encoder pulses up for one direction of rotation, down for the other โ the count is the position. CNC machines and 3D printers live on this.
- Inventory and occupancy: entry sensor counts up, exit sensor counts down โ parking garages ("SPACES: 47") and room-occupancy limits.
- Elevator floor indicators, kitchen-timer countdowns, and any set-then-count-to-zero interval logic.
The Johnson (Twisted-Ring) Counter โ and the Family Portrait
Construction: One Twist
Take Lesson 6's shift register and close the loop โ feed the last output back to the input and data circulates in a ring. Now add the twist: feed back the inverted last output (Q̅โ โ Dโ). That single inversion creates the Johnson counter:
A wave of 1s washes in, then washes out โ 2n states from n flip-flops (here MOD-8)
Why Designers Love It
- Only one bit changes per clock. Decode any state with a single 2-input AND gate, and the decoded outputs are glitch-free โ no ripple-counter race conditions, no momentary false states.
- 2n states beats the plain ring counter's n states for the same hardware (a 4-FF ring gives only 4 states; the twist doubles it).
- Self-clocking sequencing: the overlapping waveforms are naturally phase-shifted square waves โ historically used for quadrature signals and switch-tail sequencers.
Applications: state sequencers and phase generators (stepper-motor drive waveforms), the classic 4017-style LED chasers (a Johnson counter plus decoding), and glitch-free timing-signal generation.
The Counter Family, Side by Side
| Counter | MOD (4 FFs) | Sequence Style | Signature Application |
|---|---|---|---|
| 4-bit binary | 16 | Binary count 0โ15 | Event counting, รท16, addressing |
| BCD (decade) | 10 | 0โ9, reset at 1010 | Digit displays, รท10 prescalers |
| Up/Down | 16 (both ways) | Direction-controlled | Position, inventory, occupancy |
| Johnson | 8 (= 2n) | Walking-1s wave, one bit changes per clock | Glitch-free sequencing, phase generation |