⚑ ELT 102 · Digital Logic & Solid State Devices Lesson 4 of 8
Unit 2 Β· Active Devices

BJTs, FETs, MOSFETs, SCR & TRIAC

NPN and PNP transistor operation, the three BJT configurations, and DC load line analysis for bias β€” plus JFETs vs. MOSFETs, SCR and TRIAC triggering, and high-power switching applications. What each device is, how it works, and where a technician will meet it.

⏱ 3 Hours Study πŸ“‹ 9 Core Topics πŸ“ Schematic Symbol Library πŸ“ˆ 5-Mode Curve Tracer

Learning Objectives

By the end of this lesson, you will be able to:

  • Identify the schematic symbols, terminals, and packages of NPN/PNP BJTs, N- and P-channel JFETs and MOSFETs, SCRs, TRIACs, and DIACs.
  • Explain NPN and PNP transistor operation, including how a small base current controls a large collector current (IC = Ξ² Γ— IB).
  • Distinguish the three BJT operating regions β€” cutoff, active, and saturation β€” and relate each to switch-OFF, amplifier, and switch-ON behavior.
  • Compare the common-emitter, common-base, and common-collector configurations by gain, impedance, and typical application.
  • Construct a DC load line on a set of collector characteristic curves and locate the Q-point for a given bias.
  • Differentiate JFETs from MOSFETs, including voltage-controlled operation, pinch-off vs. threshold voltage, and gate-handling (ESD) precautions.
  • Describe SCR triggering, latching, and holding current, and explain why an SCR stays on after the gate signal is removed.
  • Explain TRIAC phase-control operation in AC power circuits such as lamp dimmers and motor speed controls.
  • Select the appropriate device β€” BJT, MOSFET, SCR, or TRIAC β€” for a given switching or amplification task using a technician's decision criteria.

Key Terms & Concepts

Click any card to reveal its definition.

BJT Fundamentals
Bipolar Junction Transistor (BJT)
BJT Fundamentals
πŸ”„ Click to reveal definition
Definition
A three-terminal device (emitter, base, collector) built from two P-N junctions. A small base current controls a much larger collector current β€” the foundation of amplification and switching.
NPN vs. PNP
BJT Fundamentals
πŸ”„ Click to reveal definition
Definition
The two BJT polarities. NPN: current flows collectorβ†’emitter, turned on by base β‰ˆ0.7 V above the emitter. PNP: the mirror image β€” emitterβ†’collector, turned on by base β‰ˆ0.7 V below the emitter. Symbol memory aid: NPN = arrow Not Pointing iN.
Beta (Ξ² / hFE)
BJT Fundamentals
πŸ”„ Click to reveal definition
Definition
The DC current gain: Ξ² = IC / IB, typically 50–300. A 100 Β΅A base current through a Ξ²=100 transistor commands 10 mA of collector current.
Cutoff Region
BJT Fundamentals
πŸ”„ Click to reveal definition
Definition
Both junctions reverse biased: no base current, essentially no collector current, and VCE β‰ˆ supply voltage. The transistor is an open switch.
Active (Linear) Region
BJT Fundamentals
πŸ”„ Click to reveal definition
Definition
Base-emitter forward biased, base-collector reverse biased. IC = Ξ²Β·IB holds, so the output is a faithful, amplified copy of the input. Amplifiers live here.
Saturation Region
BJT Fundamentals
πŸ”„ Click to reveal definition
Definition
Base current is so high the collector can't keep up: VCE collapses to β‰ˆ0.2 V and IC is limited only by the external circuit. The transistor is a closed switch.
Configurations & Biasing
Common Emitter (CE)
Configurations
πŸ”„ Click to reveal definition
Definition
Input at the base, output at the collector, emitter shared. High voltage AND current gain, output inverted 180Β°. The workhorse amplifier and switching configuration.
Common Base (CB)
Configurations
πŸ”„ Click to reveal definition
Definition
Input at the emitter, output at the collector, base grounded. Voltage gain but current gain < 1; very low input impedance; excellent at high frequencies (RF amplifiers).
Common Collector (Emitter Follower)
Configurations
πŸ”„ Click to reveal definition
Definition
Input at the base, output at the emitter. Voltage gain β‰ˆ 1 but high current gain; high input impedance, low output impedance β€” the classic buffer between a weak source and a heavy load.
DC Load Line
Configurations
πŸ”„ Click to reveal definition
Definition
A straight line drawn across the collector curves from (VCC, 0) to (0, VCC/RC). Every possible operating point of the circuit lies on this line β€” the circuit's "menu" of allowed conditions.
Q-Point (Quiescent Point)
Configurations
πŸ”„ Click to reveal definition
Definition
The DC operating point β€” the intersection of the load line with the curve for the actual base current. Amplifiers bias the Q-point mid-line for maximum undistorted swing; switches slam it to the two ends.
Biasing
Configurations
πŸ”„ Click to reveal definition
Definition
Setting the DC voltages and currents that hold a transistor at its intended Q-point before any signal is applied. Voltage-divider bias is the standard technician circuit because it holds the Q-point steady despite Ξ² variations.
FETs & MOSFETs
Field-Effect Transistor (FET)
FETs & MOSFETs
πŸ”„ Click to reveal definition
Definition
A three-terminal device (gate, drain, source) in which a voltage on the gate controls current through a channel. Draws essentially zero gate current β€” unlike the current-controlled BJT.
JFET
FETs & MOSFETs
πŸ”„ Click to reveal definition
Definition
Junction FET: a normally-ON channel that reverse-biased gate voltage progressively squeezes shut. Conducts IDSS at VGS=0 and turns fully off at the pinch-off voltage VP.
Pinch-Off Voltage (VP)
FETs & MOSFETs
πŸ”„ Click to reveal definition
Definition
The gate-source voltage at which a JFET's channel is fully depleted and drain current stops (e.g., βˆ’4 V for an N-channel part). The JFET equivalent of "fully off."
MOSFET
FETs & MOSFETs
πŸ”„ Click to reveal definition
Definition
Metal-Oxide-Semiconductor FET: the gate is insulated from the channel by a glass-thin oxide layer, so gate current is truly zero. Enhancement-mode MOSFETs are normally OFF β€” the dominant transistor in all modern electronics.
Threshold Voltage (VTH)
FETs & MOSFETs
πŸ”„ Click to reveal definition
Definition
The minimum gate-source voltage that forms a conducting channel in an enhancement MOSFET (typically 1–4 V). Below VTH: off. Above it, drain current grows rapidly β€” "logic-level" MOSFETs switch fully at 5 V.
ESD Sensitivity
FETs & MOSFETs
πŸ”„ Click to reveal definition
Definition
The MOSFET's gate oxide is only nanometers thick and punctures at ~50–100 V β€” less than a static-charged fingertip. Handle with grounded wrist straps, anti-static mats, and conductive foam.
RDS(on)
FETs & MOSFETs
πŸ”„ Click to reveal definition
Definition
The drain-source resistance of a fully-on MOSFET β€” milliohms in power parts. Conduction loss is IΒ²R, which is why MOSFETs run cool where a saturated BJT (fixed 0.2 V drop) would cook.
Thyristors: SCR & TRIAC
Thyristor Family
Thyristors
πŸ”„ Click to reveal definition
Definition
Four-layer (PNPN) latching switches: once triggered on, they stay on with no further gate signal until the load current itself drops away. Built for high power β€” amps to thousands of amps.
SCR
Thyristors
πŸ”„ Click to reveal definition
Definition
Silicon Controlled Rectifier: a latching diode. Blocks in both directions until a gate pulse fires it; then conducts anode→cathode like a diode until current falls below the holding value. One-way (DC or half-wave AC) power control.
Latching & Holding Current
Thyristors
πŸ”„ Click to reveal definition
Definition
Latching current: the minimum anode current that must be reached during the gate pulse for the SCR to stay on. Holding current (IH): the minimum that keeps it on afterward β€” drop below it and the SCR snaps off.
Commutation
Thyristors
πŸ”„ Click to reveal definition
Definition
Turning a thyristor off. On AC it happens free of charge β€” current crosses zero every half-cycle. On DC the circuit must force the current below IH, which is why SCRs love AC and complicate DC designs.
TRIAC
Thyristors
πŸ”„ Click to reveal definition
Definition
Effectively two SCRs in antiparallel with one gate: conducts in both directions, so it controls full AC waveforms. Terminals are MT1, MT2, and Gate. The heart of lamp dimmers and small motor controls.
Phase (Firing-Angle) Control
Thyristors
πŸ”„ Click to reveal definition
Definition
Delaying the trigger point within each AC half-cycle. Firing early (small angle) delivers nearly full power; firing late (large angle) delivers a sliver. Smooth, efficient power control with no dropping resistor.
DIAC
Thyristors
πŸ”„ Click to reveal definition
Definition
A gateless bidirectional trigger diode that breaks over sharply at β‰ˆΒ±32 V. Placed in series with a TRIAC gate, it delivers a crisp, symmetric trigger pulse in both half-cycles β€” the standard dimmer trigger.

πŸ“ Schematic Symbol Library

A technician reads schematics before touching a board. Learn these nine symbols cold β€” terminal names included. Memory aids: the BJT arrow is always on the emitter and points toward N material ("NPN = arrow Not Pointing iN"); the FET gate arrow points in for N-channel; the broken channel line means enhancement mode (normally off).

BCE
NPN Transistor
General switching & amplification Β· arrow OUT (Not Pointing iN)
BCE
PNP Transistor
Mirror-image polarity Β· arrow IN toward the base bar
GDS
N-Channel JFET
Normally ON Β· gate arrow points IN Β· low-noise inputs
GDS
P-Channel JFET
Normally ON Β· gate arrow points OUT
GDS
N-Ch MOSFET (Enh.)
Normally OFF Β· broken channel Β· the modern power switch
GDS
P-Ch MOSFET (Enh.)
Normally OFF Β· substrate arrow reversed Β· high-side switching
AKG
SCR
Latching one-way switch Β· gate fires it, holding current keeps it on
MT2MT1G
TRIAC
Two SCRs back-to-back Β· conducts both directions Β· AC power control
T1T2
DIAC
Gateless bidirectional trigger (~Β±32 V) Β· fires the TRIAC in dimmers

Core Lesson Content

The Active Device Family Tree

Lessons 1–2 covered devices that react to voltage β€” diodes conduct or block based on polarity alone. This lesson introduces devices that control: a small signal at one terminal commanding a large current between two others. Every amplifier, logic gate, motor drive, and power controller is built on that idea.

FamilyControlled ByBehaviorTechnician Encounters It In
BJT (NPN/PNP)Base currentProportional amplifier or switchAudio stages, relay drivers, legacy boards everywhere
JFETGate voltage (normally on)Voltage-squeezed channelInstrument inputs, low-noise preamps
MOSFETGate voltage (normally off)Near-perfect voltage-controlled switchPower supplies, motor drives, every computer chip
SCRGate pulse (latches)One-way latching power switchDC power control, crowbars, battery chargers
TRIACGate pulse (latches, both ways)Two-way latching AC switchDimmers, heaters, small motor speed controls
πŸ’‘ Technician's Frame
You don't need device-physics equations to service these parts. You need three things per device: the symbol, what turns it on and off, and what circuits it lives in. That is exactly how each tab below is organized.

Try It Live

NPN and PNP Transistor Operation

A BJT is a sandwich of three doped regions forming two P-N junctions: emitter (heavily doped carrier source), base (whisper-thin middle layer), and collector (the large region that gathers carriers). The magic is the thin base: carriers injected from the emitter mostly fly straight through it into the collector.

NPN in Action (the common case)

  1. Raise the base β‰ˆ0.7 V above the emitter β€” the base-emitter junction forward biases exactly like a diode.
  2. Electrons flood from the emitter into the paper-thin base. A tiny fraction exits the base lead as base current IB.
  3. The vast majority β€” typically 99% β€” are swept across the reverse-biased base-collector junction into the collector: IC = Ξ²Β·IB.
IC = Ξ² Γ— IB   |   IE = IC + IB   |   VBE(on) β‰ˆ 0.7 V

PNP is the exact mirror: the emitter sits at the higher potential, the base is pulled β‰ˆ0.7 V below the emitter to turn on, and conventional current flows emitterβ†’collector. PNPs are the natural choice for switching loads on the positive rail (high-side switching).

The Three Operating Regions = The Three Jobs

RegionConditionVCEActs Like
CutoffIB = 0β‰ˆ VCCOpen switch (OFF)
Active0 < IC < saturationBetween limitsAmplifier: IC = Ξ²Β·IB
SaturationΞ²Β·IB > circuit can supplyβ‰ˆ 0.2 VClosed switch (ON)
🎯 Bench Check
A healthy silicon BJT in-circuit and conducting shows VBE β‰ˆ 0.7 V. Measure 0 V (shorted junction) or the full drive voltage (open junction) and you've found your fault. Diode-test mode across B-E and B-C confirms it out of circuit β€” each junction should read like one diode.

The Three BJT Configurations

Any amplifier uses two terminals for input and two for output β€” so one of the transistor's three leads must be shared ("common"). Which lead you share completely changes the amplifier's personality.

PropertyCommon EmitterCommon BaseCommon Collector
(Emitter Follower)
Input / OutputBase / CollectorEmitter / CollectorBase / Emitter
Voltage gainHighHighβ‰ˆ 1
Current gainHigh (Ξ²)< 1 (Ξ± β‰ˆ 0.99)High (Ξ²+1)
Phase inversionYes β€” 180Β°NoNo
Input impedanceModerateVery lowHigh
Output impedanceModerate-highHighLow
Classic roleGeneral gain stage, switchingRF / high-frequency ampsBuffer / driver stage

How to Remember Them

  • Common Emitter β€” "the amplifier": the only configuration with both voltage and current gain, so it's the default. Its 180Β° inversion matters when you trace signals: input rises, output falls.
  • Common Collector β€” "the muscle": the output faithfully follows the input voltage (hence emitter follower) but with Ξ²-times the current behind it. Placed between a delicate source and a heavy load β€” like a speaker or a long cable.
  • Common Base β€” "the specialist": rare in general work; shines at radio frequencies where its geometry avoids the internal feedback that destabilizes CE stages.
πŸ’‘ Reading Real Schematics
Identify the configuration by finding which terminal carries no signal (it's grounded or tied to a rail through a bypass capacitor). Signal in at base + out at collector = CE. In at base + out at emitter = follower. In at emitter = CB.

DC Load Line Analysis

The transistor's characteristic curves tell you what the device can do; the resistor and supply decide what the circuit allows. The DC load line is where those two constraints meet β€” a single straight line containing every operating point the circuit permits.

Drawing the Line (two points, 30 seconds)

Saturation end (x=0):  IC(sat) = VCC / RC   |   Cutoff end (y=0):  VCE(off) = VCC
  1. Cutoff point: no collector current β†’ no drop across RC β†’ VCE = VCC. Mark (VCC, 0).
  2. Saturation point: transistor fully on (β‰ˆ0 V across it) β†’ all of VCC is across RC β†’ IC = VCC/RC. Mark (0, VCC/RC).
  3. Connect them. Done.

Finding the Q-Point

The circuit must satisfy the load line and the transistor's curve for the actual base current. Their intersection is the Q-point β€” the circuit's resting state.

Worked example: VCC = 20 V, RC = 2 kΞ©, Ξ² = 100, IB = 30 Β΅A. Load line runs (20 V, 0) to (0, 10 mA). IC = 100 Γ— 30 Β΅A = 3 mA, so VCE = 20 βˆ’ (3 mA)(2 kΞ©) = 14 V. Q = (14 V, 3 mA) β€” comfortably in the active region.

  • Amplifier bias: park Q near the middle of the line so the signal can swing both directions without hitting cutoff or saturation (clipping).
  • Switch bias: deliberately overdrive the base so Q slams between the two ends of the line β€” fully off or fully on, never lingering in the lossy middle.
⚠️ Watch Out
Ξ² varies wildly β€” 2:1 between "identical" parts and more over temperature. A design that sets Q purely by Ξ² (base bias) drifts badly; voltage-divider bias with an emitter resistor holds Q steady. As a technician, expect the circuit, not the transistor, to define the operating point in well-designed equipment.

JFETs: The Voltage-Squeezed Channel

A JFET is conceptually a doped resistor with a valve around it. Current flows source→drain through a channel of N (or P) material. The gate forms a reverse-biased junction wrapped around that channel: increasing reverse gate voltage widens the junction's depletion region, squeezing the channel narrower until — at the pinch-off voltage VP — it closes entirely.

The Two Headline Facts

  • Normally ON: with VGS = 0 the channel is wide open, conducting its maximum current IDSS. Gate voltage only ever reduces current (depletion mode).
  • Essentially zero gate current: the gate junction is always reverse biased, so input resistance is hundreds of megohms β€” the JFET loads its signal source almost not at all.
ID = IDSS (1 βˆ’ VGS/VP)Β²   (e.g., IDSS = 10 mA, VP = βˆ’4 V)

Where a Technician Meets JFETs

  • Instrument and sensor inputs: oscilloscope front ends, pH meters, condenser microphone preamps β€” anywhere the source can't supply current.
  • Low-noise audio stages and analog switches/choppers.
  • Constant-current sources: a JFET with gate tied to source self-regulates at IDSS.
🎯 Quiz Tip
Keep the polarity straight for N-channel: VGS runs from 0 (full on, IDSS) to VP negative (fully off). Forward-biasing the gate is never the answer β€” it turns the input junction into a conducting diode and destroys the "zero gate current" property.

MOSFETs: The Modern Default

The MOSFET insulates its gate from the channel with a nanometers-thin layer of silicon dioxide β€” the gate is one plate of a capacitor. Gate current is truly zero; the gate voltage's electric field creates or destroys the channel beneath the oxide.

Enhancement Mode (the one you'll actually service)

With no gate voltage there is no channel β€” the device is OFF. Raise VGS past the threshold voltage VTH (1–4 V) and the field pulls electrons to the surface, forming ("enhancing") a conductive channel. More gate voltage β†’ wider channel β†’ lower resistance:

VGS < VTH: OFF  |  VGS > VTH: ON, down to RDS(on) of milliohms

Why MOSFETs Took Over Power Switching

  • Drive is nearly free: no continuous gate current β€” a logic pin can hold a 50 A switch on (it only supplies brief pulses to charge the gate capacitance).
  • Cool conduction: a saturated BJT always drops β‰ˆ0.2 V (0.2 V Γ— 20 A = 4 W of heat); a 5 mΞ© MOSFET at 20 A drops 0.1 V (2 W) β€” and modern parts do far better.
  • Speed: no stored base charge to sweep out, so MOSFETs switch in nanoseconds β€” the enabler of switching power supplies and PWM motor drives.

JFET vs. MOSFET at a Glance

PropertyJFETMOSFET (enhancement)
Normal state (VGS=0)ON (IDSS)OFF
Gate isolationReverse-biased junctionOxide insulator (true zero current)
Turn-on/off parameterPinch-off VPThreshold VTH
Power handlingSmall-signalMilliwatts to kilowatts
ESD sensitivityModerateSevere β€” handle protected
Typical roleLow-noise analog inputSwitching, power, logic β€” everything
⚠️ Watch Out: ESD Kills MOSFETs Silently
The gate oxide punctures at roughly 50–100 V β€” a static charge you cannot even feel (you feel nothing below β‰ˆ3,000 V). Wrist strap, grounded mat, conductive foam on loose parts, touch chassis ground before probing. A zapped MOSFET may work degraded for weeks before failing β€” the worst kind of fault to chase.

SCRs: The Latching Power Switch

The Silicon Controlled Rectifier is a four-layer PNPN device β€” think of it as a diode with a trigger. Off, it blocks in both directions. Pulse the gate while the anode is positive and internal regenerative feedback snaps it fully on in microseconds. Then comes the defining behavior:

πŸ’‘ The Latch
Once conducting, the SCR ignores its gate entirely. The two internal transistor sections keep each other on. The only way to turn it off is to reduce the anode current below the holding current IH β€” interrupt the load, force a reverse voltage, or (on AC) simply wait for the next zero crossing.

The Three Numbers on Every SCR Datasheet

  • Gate trigger current (IGT): the pulse needed to fire it β€” often just 5–50 mA controlling hundreds of amps.
  • Latching current: the anode current that must be reached during the gate pulse or the SCR falls back off.
  • Holding current (IH): the minimum anode current that keeps it on afterward.

Where Technicians Meet SCRs

  • Controlled rectifiers: replacing diodes in a bridge so the DC output is adjustable β€” battery chargers, DC motor drives, welders, electroplating supplies.
  • Crowbar overvoltage protection: a Zener senses overvoltage and fires an SCR straight across the supply, blowing the fuse and saving the load β€” the latch is the feature.
  • Soft-start and phase-controlled heaters at industrial power levels (SCRs scale to thousands of volts and amps).
🎯 Bench Check
Test the latch with a resistor and a bench supply: SCR off, gate open β†’ no load current. Touch the gate to anode-positive through a resistor β†’ load current flows. Remove the gate connection β†’ current keeps flowing. Break the anode circuit for an instant β†’ off and stays off. That four-step sequence proves both triggering and holding behavior.

TRIACs and Phase Control

An SCR wastes half of every AC cycle β€” it's a rectifier at heart. The TRIAC fuses two SCRs in antiparallel with a single gate, conducting in both directions between MT1 and MT2. One small gate pulse per half-cycle gives complete AC power control.

Phase (Firing-Angle) Control

On AC, every zero crossing turns the TRIAC off for free. Power control becomes a question of when in each half-cycle you fire it:

  • Fire at 10Β°: the load receives almost the entire half-cycle β€” near full power.
  • Fire at 90Β°: the load gets the second half of each hump β€” about 50% power.
  • Fire at 160Β°: only a sliver conducts β€” a dim glow.

A simple RC network delays a sample of the line voltage; when it reaches the DIAC's Β±32 V breakover, the DIAC dumps a crisp pulse into the TRIAC gate. Turning the potentiometer changes the RC delay β€” that potentiometer is the dimmer knob on your wall.

Dimmer chain: LINE β†’ R (pot) + C delay β†’ DIAC breakover β†’ TRIAC gate β†’ LOAD

Applications and Limits

  • Lamp dimmers, heater controls, small universal-motor speed controls (drills, fans, mixers) up to roughly 40 A.
  • Solid-state relays (SSRs): an optocoupler (Lesson 2!) firing a TRIAC β€” logic-controlled, isolated AC switching with no moving parts.
  • Snubbers: an RC network across the TRIAC prevents false triggering from fast voltage spikes (dV/dt) β€” a missing or failed snubber is a classic cause of a dimmer that flickers or self-fires.
  • For very large loads, designers return to back-to-back SCR pairs, which outrun TRIACs in ratings.
⚠️ Watch Out
Phase-controlled waveforms are not sinusoidal β€” a cheap average-responding meter lies about their RMS value. Verify chopped waveforms with a true-RMS meter or, better, the oscilloscope skills from Lesson 2.

Choosing the Right Device: A Technician's Decision Guide

Every device in this lesson switches or amplifies. The differences that matter on the bench are what controls it, whether it latches, and how much power it moves.

BJTMOSFETSCRTRIAC
Control inputContinuous base currentGate voltage (no current)One gate pulseOne gate pulse per half-cycle
Turns off when…Base drive removedGate voltage removedCurrent < IHEvery AC zero crossing
Latches?NoNoYesYes (per half-cycle)
ConductsOne directionOne direction (body diode reverse)One directionBoth directions
Proportional (amplifier) use?YesYesNo β€” on/off onlyNo β€” on/off only
Power classmW – ~100 WmW – kWW – MWW – ~10 kW

Fast Selection Rules

  • Amplifying a signal? BJT (or small-signal FET for high-impedance sources). Thyristors need not apply β€” they only know ON and OFF.
  • Switching DC efficiently or quickly (PWM)? MOSFET, almost without exception in modern designs.
  • Switching AC power proportionally? TRIAC (with DIAC trigger) up to ~40 A; back-to-back SCRs beyond.
  • Need the switch to stay on after a momentary trigger β€” alarms, crowbars, controlled rectifiers? SCR: the latch is the point.
  • Driving a relay or LED from a logic pin? Small NPN (2N3904-class) or logic-level MOSFET β€” either works; the MOSFET wastes no drive current.
πŸ’‘ Pulling the Course Together
Notice the stack you've built: diodes (Lesson 1) steer current β†’ rectifiers, filters, optocouplers (Lesson 2) build and isolate power β†’ transistors and thyristors (this lesson) control it. Next, these same transistors shrink, multiply by millions, and become the logic gates of the digital half of ELT 102.

πŸ“ˆ Interactive 5-Mode Curve Tracer & Switching Simulator

One instrument, five devices. BJT / JFET / MOSFET modes plot live characteristic curve families with a DC load line β€” drag the control slider and ride the green Q-point between cutoff, active/ohmic, and saturation. SCR mode is a live latching bench test, and TRIAC mode is a working phase-control dimmer.

Fixed circuit: VCC = 20 V, RC = 2 kΞ© β†’ load line (20 V, 0) ↔ (0, 10 mA)

Device: IDSS = 10 mA, VP = βˆ’4 V Β· Circuit: VDD = 20 V, RD = 1.5 kΞ©

Device: VTH = 2 V, K = 1 mA/VΒ² Β· Circuit: VDD = 20 V, RD = 1 kΞ©

12 V DC supply Β· Holding current IH = 30 mA. Set the load below 30 mA and try to latch it…

120 VAC 60 Hz through a lamp load. Small angle = early firing = bright; large angle = late = dim.

πŸ’‘ Guided Explorations
1. Ride the load line (BJT): sweep IB from 0 β†’ 60 Β΅A and watch the Q-point travel from cutoff to saturation; note the readout region changing at each end. 2. Ξ² sensitivity: park IB at 30 Β΅A and slide Ξ² from 50 β†’ 200 β€” the Q-point drifts across the entire line, which is exactly why Ξ²-dependent bias is bad design. 3. Pinch-off (JFET): start at VGS = 0 (IDSS) and squeeze to βˆ’4 V β€” the curve family collapses to zero. 4. Threshold (MOSFET): creep VGS upward and find the exact voltage where drain current first appears β€” that's VTH. 5. The latch (SCR): fire the gate, note the current keeps flowing with no gate; interrupt the anode to reset. Then set the load below 30 mA and prove it won't latch at all. 6. Dimmer (TRIAC): sweep Ξ± from 5Β° β†’ 175Β° and watch the shaded conduction area, the power %, and the lamp glow all track together.

Key Facts Reference Box

BJT Terminals
Emitter Β· Base Β· Collector
BJT Gain Law
IC = Ξ² Γ— IB (Ξ² β‰ˆ 50–300)
Turn-On Voltage
VBE β‰ˆ 0.7 V (Si)
Saturated VCE
β‰ˆ 0.2 V (closed switch)
Symbol Arrow Rule
On the emitter Β· NPN = Not Pointing iN
Load Line Endpoints
(VCC, 0) and (0, VCC/RC)
CE Configuration
High V & I gain Β· inverts 180Β°
Emitter Follower
V gain β‰ˆ 1 Β· buffer Β· low Z out
FET Terminals
Gate Β· Drain Β· Source
JFET Nature
Normally ON Β· off at pinch-off VP
JFET Current Law
ID = IDSS(1 βˆ’ VGS/VP)Β²
Enh. MOSFET Nature
Normally OFF Β· on above VTH
MOSFET Handling
ESD-sensitive β€” strap & mat always
SCR Turn-Off Rule
Anode current < IH (gate is powerless)
TRIAC Terminals
MT1 Β· MT2 Β· Gate (conducts both ways)
Dimmer Trigger Chain
RC delay β†’ DIAC (Β±32 V) β†’ TRIAC gate

Interactive Knowledge Check

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