Sequential Logic Lab — Operation Simulator

📈 Sequential Logic Lab — Operation Simulator

All eight devices from the symbol library, live. The left side of the canvas shows the device with its current input and output states; the right side is a scrolling timing diagram recording everything you do. Toggle inputs with the buttons (or click the input pins on the canvas), pulse the clock manually to see edge-triggering, or switch on the auto-clock and watch behaviors like divide-by-2 draw themselves.

💡 Input pins on the device symbol are clickable too.

Device Under Test

Inputs

Clock

Auto-clock (free-running)

💡 Guided Explorations

1. Memory itself (SR Latch): pulse S on then off — Q stays set with both inputs at 0. That hold is the bistable remembering. 2. The forbidden state: set S=1 and R=1 — read the red INVALID warning, then release both and notice the outcome is arbitrary. 3. Gating (Gated SR): wiggle S with EN=0 — nothing; raise EN — instant response. 4. Transparency (D Latch): toggle D rapidly with EN=1 and watch Q chase it in the timing lanes; drop EN and the chase freezes. 5. The camera (D FF): change D two or three times without pulsing the clock — Q ignores everything; now pulse once — Q captures only the value at the edge. 6. Universal toggle (JK): J=K=1, auto-clock on — Q flips every rising edge. 7. Divide-by-2 (T FF): T=1, auto-clock on — count edges in the CLK lane vs the Q lane: exactly 2:1, frequency division drawn live.