⚡ Digital Electronics Laboratory

4-Bit Up/Down Counter

Interactive Simulator & Learning Module  |  MVCC Digital Systems

Counter Output Display
COUNT UP
Q3 (8)
0
Q2 (4)
0
Q1 (2)
0
Q0 (1)
0
Decimal
0
Binary
0000
Hex
0x0
OVERFLOW / CARRY-OUT
UNDERFLOW / BORROW
ZERO FLAG
MAX (15)
Control Inputs
Parallel Load (Manual Preset)
Quick Presets
State Transition Table
DecQ3Q2Q1Q0HexNotes
Live Clock Waveform & Count History
Count Trail (last 32 steps)
Core Concepts

🔼 Up Counting

When U/D̄ = 1, each clock pulse increments Q by +1. After 1111 (15), the counter wraps to 0000 and sets the carry-out (overflow) flag.

🔽 Down Counting

When U/D̄ = 0, each pulse decrements Q by −1. After 0000 (0), it wraps to 1111 (15) and asserts the borrow (underflow) flag.

⚡ Synchronous Operation

All flip-flops (Q3–Q0) change state simultaneously on the active clock edge — eliminating output glitches seen in ripple counters.

📥 Parallel Load

A preset/load input asynchronously forces any binary value directly into the counter, bypassing the clock sequence.

Knowledge Check
SYSTEM STATUS: READY — Use controls to operate the counter   |   Clock Pulses: 0   |   Direction: UP